USP-V Cache Write Pending
The HDS USP-V has an algorithm to prevent the cache from becoming too full. It operates as follows:
30% - start scanning cache queues for dirty data to destage
40% - scanning activity accelerates
50% - destaging becomes a priority, I/O throttled back
70% - All host I/0 delayed until cache dirty data falls below 50%
To maintain maximum efficiency it is recommended that the cache write pending doesn't exceed 30%
Other USP-V Performance Metrics
Front End CHP utilisation < 70%
Back End DKP utilisation < 50%
Array Group utilisation < 50%
LDEV utilisation < 50%
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